Basics of CMOS Design Using Cadence

SSGMCE, Shegaon: There is a three days hands-on workshop on Basics of CMOS design using Cadence at SSGMCE. The workshop is scheduled between 6th to 8th Jan 2023 for Batch I and from 20th to 22nd Jan 2023 for Batch II in the VLSI Lab, SGIARC, SSGMCE, Shegaon.